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High-level synthesis
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121	MINIMALIST: An Environment for the Synthesis, Veri cation and Testability of Burst-Mode Asynchronous Machines Add to Reading List Source URL: www1.cs.columbia.edu Language: English - Date: 2001-02-12 18:19:59 Automata theory Finite-state machine Combinational logic Asynchronous circuit High-level synthesis Electronic engineering Digital electronics Electronic design automation
122	VHDL for Simulation and Synthesis Sabih H. Gerez University of Twente Add to Reading List Source URL: wwwhome.ewi.utwente.nl Language: English Hardware description languages Logic design Electronic design VHDL Field-programmable gate array Verilog High-level synthesis Logic synthesis Standard cell Electronic engineering Digital electronics Electronic design automation
123	The Human ECO Compiler Steve Golson Add to Reading List Source URL: www.trilobyte.com Language: English - Date: 2004-03-21 14:53:16 Formal equivalence checking Integrated circuit design Application-specific integrated circuit Logic synthesis Place and route Register-transfer level High-level synthesis Netlist Wire wrap Electronic engineering Electronic design automation Engineering Change Order
124	Impulse Tutorial: Generating HDL from C-Language 1 Add to Reading List Source URL: www.impulseaccelerated.com Language: English - Date: 2009-03-30 01:00:00 C to HDL VHDL Verilog Field-programmable gate array Finite impulse response Digital signal processing E High-level synthesis Electronic engineering Hardware description languages Impulse C
125	PDF Document Add to Reading List Source URL: www.ee.bilkent.edu.tr Language: English - Date: 2006-02-28 09:57:20 Hardware description languages Logic design Electronic design High-level synthesis Field-programmable gate array Viterbi decoder Semiconductor intellectual property core Convolutional code Viterbi algorithm Electronic engineering Electronic design automation Error detection and correction
126	PDF Document Add to Reading List Source URL: www.cs.teiher.gr Language: English - Date: 2012-08-16 13:49:13 SystemC Transaction-level modeling Electronic design Electronic system-level design and verification High-level synthesis Field-programmable gate array System on a chip Modeling language Verilog Electronic engineering Electronic design automation Hardware description languages
127	PDF Document Add to Reading List Source URL: scholar.lib.vt.edu Language: English - Date: 2008-06-02 08:34:17 Reconfigurable computing Field-programmable gate array Impulse C Hardware description language Digital signal processing Software-defined radio High-level synthesis Xilinx Partial re-configuration Electronic engineering Digital electronics Electronics